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Fast CA-CFAR Processor Design with Low Hardware Complexity  

Hyun, Eu-Gin (Daegu Gyeongbuk Institute of Science & Technology, DGIST, Robotics Research Division, Advanced Radar Technology Lab.)
Oh, Woo-Jin (Kumoh National Institute of Technology, Dept. of Electronic Engineering)
Lee, Jong-Hun (Daegu Gyeongbuk Institute of Science & Technology, DGIST, Robotics Research Division, Advanced Radar Technology Lab.)
Publication Information
Abstract
In this paper, we design the CA-CFAR processor using a root-square approximation approach and a fixed-point operation to improve hardware complexity and reduce computational effort. We also propose CA-CFAR processor with multi-window, which is capable of concurrent parallel processing. The proposed architecture is synthesized and implemented into the FPGA and the performance is compared with the conventional processor designed by root-square libarary licensed by FPGA corporation.
Keywords
CFAR 프로세서;CFAR 검출기;레이더 신호처리;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
연도 인용수 순위
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