Browse > Article

Design and Implementation of Image Display Module for Low-cost High Definition Television  

Choi Jae-Seung (Digital Technology Research Center, Kyungpook National University)
Kim Ick-Hwan (LG Electronics)
Nam Jae-Yeal (Dept. of Computer Engineering, Keimyung University)
Ha Yeong-Ho (School of Electrical Engineering and Computer Science, Kyungpook National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SP / v.42, no.3, 2005 , pp. 65-72 More about this Journal
Abstract
This paper proposes an image display system that reduces the core performance of the processor allocated in the image display, thereby enabling the use of a less expensive processor with a low performance. Essentially, the proposed system supports an image display function for a high resolution in the module of an electronic picture frame (EPF) using a low-performance processor based on converting high definition (HD) image data at a 15Hz frame rate into HD image data at a 60Hz frame rate for use in a digital TV system. As a result, the proposed system can reduce the processor performance to a level corresponding to an image display with a low frame rate, thereby reducing the product cost and allowing various additional functions. Finally, the proposed system is implemented to confirm effectiveness.
Keywords
Image display system; High definition television; Electronic picture frame; FPGA;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 W. Chua-Chin, H. Ya-Hsin, C. Chiuan-Shian, H. Jih-Fon, 'A low-cost plasma display panel data dispatcher for image enhancement', IEEE Trans. on Consumer Electronics, Vol. 48, No.4, pp. 997-1003, Nov. 2002   DOI
2 Datasheet, 'The MultiMediaCard System Summary Version 3.3', MMCA Technical Committee, March 2003
3 Memory Stick Developers' site, 'http://www.memorystick.org/eng/e-index.html'
4 C. Hoseok, L. Wonchul, S. Wonyong, 'Optimization of power consumption for an ARM7-based multimedia handheld device', Proceedings of the International Symposium on Circuits and Systems, Vol. 5, pp. 105-108, 2003   DOI
5 J. Geun-young, P. Ju-sung, 'Design of 32-bit RISC processor and efficient verification', Proceedings of the 7th Korea-Russia International Symposium on Science and Technology, Vol. 2, pp. 222-227, July 2003   DOI
6 Datasheet, 'Sprtan-3 FPGA family: complete datasheet', Xilinx, pp. 1-193, Mar. 2004
7 Datasheet, 'CF+ and CompactFlash Specification Revision 2.0', CompactFlash Association, 2003
8 T. Fujio, 'High Definition Television Systems: Desirable Standards, Signal Forms, and Transmission Systems', IEEE Trans. on Comm., Vol. 29, No. 12, pp. 1882-1891, 1981   DOI
9 Datasheet, 'Information Technology Digital Compression and Coding of Continuous-Tone Still Images-Requirements and Guidelines', ITU, CCITT Rec. T.81, 1992
10 L. Keun-Sup, P. Young Cheol, Y. Dae Hee, 'Software optimization of the MPEG-audio decoder using a 32-bit MCU RISC processor', IEEE Trans. on Consumer Electronics, Vol. 48, No.3, pp. 671-676, 2002   DOI   ScienceOn
11 L. Wonchul, Y. Kisun, S. Wonyong, 'Software optimization of MPEG audio layer-III for a 32 bit RISC processor', Asia-Pacific Conference on Circuits and Systems, Vol. 1, pp. 435-438, 2002   DOI
12 Datasheet, 'High Performance Digital Image and Video Processor AT76C120', Atmel, 2004
13 Standard, 'High Definition TV Analog Component Video Interface', Electronic Industries Alliance (EIA), EIA-770.3, pp. 1-18, Sep. 1998
14 김익환， 최재승， '디지털 TV에 멀티미디어 부가기능을 구현하기 위한 시스템 설계 및 구현'，2003년도 대한전자공학회 신호처리소사이어티 추계학술대회논문집, pp. 513-516, 2003   과학기술학회마을