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Performance Analysis of Implementation on Image Processing Algorithm for Multi-Access Memory System Including 16 Processing Elements  

Lee, You-Jin (Department of Information Communications Engineering, ChungNam National University)
Kim, Jea-Hee (Department of Information Communications Engineering, ChungNam National University)
Park, Jong-Won (Department of Information Communications Engineering, ChungNam National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea CI / v.49, no.3, 2012 , pp. 8-14 More about this Journal
Abstract
Improving the speed of image processing is in great demand according to spread of high quality visual media or massive image applications such as 3D TV or movies, AR(Augmented reality). SIMD computer attached to a host computer can accelerate various image processing and massive data operations. MAMS is a multi-access memory system which is, along with multiple processing elements(PEs), adequate for establishing a high performance pipelined SIMD machine. MAMS supports simultaneous access to pq data elements within a horizontal, a vertical, or a block subarray with a constant interval in an arbitrary position in an $M{\times}N$ array of data elements, where the number of memory modules(MMs), m, is a prime number greater than pq. MAMS-PP4 is the first realization of the MAMS architecture, which consists of four PEs in a single chip and five MMs. This paper presents implementation of image processing algorithms and performance analysis for MAMS-PP16 which consists of 16 PEs with 17 MMs in an extension or the prior work, MAMS-PP4. The newly designed MAMS-PP16 has a 64 bit instruction format and application specific instruction set. The author develops a simulator of the MAMS-PP16 system, which implemented algorithms can be executed on. Performance analysis has done with this simulator executing implemented algorithms of processing images. The result of performance analysis verifies consistent response of MAMS-PP16 through the pyramid operation in image processing algorithms comparing with a Pentium-based serial processor. Executing the pyramid operation in MAMS-PP16 results in consistent response of processing time while randomly response time in a serial processor.
Keywords
Parallel Processing; Multi-Access Memory System; Image Processing; SIMD Computer;
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  • Reference
1 J.W. Park, "An Efficient Memory system for Image Processing," IEEE Trans. Computers, Vol. C-35, No. 7, pp. 669-674, Jul. 1986.   DOI
2 J.W. Park, "Multiaccess Memory System for Attached SIMD Computer," IEEE Trans. on Computers, Vol. 53, No. 3, pp. 1439-452, Apr. 2004.
3 H. Lee, H.K. Cho and D.S. You, "An MAMS-PP4: Multi-Access Memory System Used to Improve the Processing Speed of Visual Media Applications in Parallel Processing System," IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 11, pp. 2852-2858, Nov. 2004.
4 유인식, "영상처리를 위한 MAMS (Multi-Access Memory System) 병렬처리기의 시뮬레이터 구현", 충남대학교 석사학위 논문, 2010년 8월.
5 D.C. Van Voorhis and T.H. Morrin, "Memory System for Image Processing," IEEE Trans. on Computers, Vol. C-27, No. 1, pp. 1145-1155, Dec. 1975.
6 D.H. Lawrie and C.R. Vora, "The Prime Memory System for Image Processing," IEEE Trans. on Computers, Vol. C-31, No. 5, pp.435-442, May 1992.
7 김중배. "Gray-scale Morphological 필터를 위한 병렬 처리기," 충남대학교 석사학위 논문, 2000년 6월.
8 J.W. Park, "An efficient buffer memory system for subarray access," IEEE Trans. on Parallel and Distributed Systems, Vol. 12, No. 3, pp. 316-335, Mar. 2001.   DOI   ScienceOn