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Design Optimization Techniques of a Phase Interpolator for High-Speed Applications  

Hwang, Hye-Won (College of Information and Communication Engineering, Sungkyunkwan University)
Alon, Elad (Department of Electrical Engineering and Computer Sciences, University of California)
Chun, Jung-Hoon (College of Information and Communication Engineering, Sungkyunkwan University)
Kwon, Kee-Won (College of Information and Communication Engineering, Sungkyunkwan University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.49, no.1, 2012 , pp. 43-51 More about this Journal
Abstract
This paper presents the design optimization technique for a phase interpolator(PI) and suggests the inductor-loaded PI structure for low power consumption suitable for high-speed applications. An analytical study leads to the design criterion composed of the process constants for the minimum power consumption and the proposed inductor-loaded PI reduces the power by half with determined bandwidth and gain of PI. Designed 7-bit PI using $0.13{\mu}m$ 1.2V CMOS technology consumes $721.2{\mu}W$ in 12GHz with inductor and the suggested optimization technique.
Keywords
phase interpolator; phase mixer; transceiver; high-speed I/O;
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Times Cited By KSCI : 2  (Citation Analysis)
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