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A 4.8-Gb/s QPSK Demodulator For 60-GHz WPAN  

Kim, Du-Ho (Department of Electrical and Electronic Engineering, Yonsei University)
Choi, Woo-Young (Department of Electrical and Electronic Engineering, Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.48, no.1, 2011 , pp. 7-13 More about this Journal
Abstract
A mixed-mode QPSK demodulator for 60-GHz wireless personal area network application is demonstrated. In this work, mixed-mode QPKS demodulation scheme achieving low power consumption and small area is employed. The prototype chip realized by 60-nm CMOS Logic process can demodulate up to 4.8-Gb/s QPSK signals at 4.8-GHz carrier frequency. At this carrier frequency, the demodulator core consumes 54 mW from 1.2-V power supply while the chip area is $150{\times}150{\mu}m^2$. Using the fabricated chip, transmission and demodulation of 1.7-GSymbol/s QPSK signal in 60-GHz link is demonstrated.
Keywords
QPSK; 60GHz; WPAN; CDR;
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  • Reference
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