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Floating Point Converter Design Supporting Double/Single Precision of IEEE754  

Park, Sang-Su (Department of Electric &Electronics Engineering, Yonsei University)
Kim, Hyun-Pil (Department of Electric &Electronics Engineering, Yonsei University)
Lee, Yong-Surk (Department of Electric &Electronics Engineering, Yonsei University)
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Abstract
In this paper, we proposed and designed a novel floating point converter which supports single and double precisions of IEEE754 standard. The proposed convertor supports conversions between floating point number single/double precision and signed fixed point number(32bits/64bits) as well as conversions between signed integer(32bits/64bits) and floating point number single/double precision and conversions between floating point number single and double precisions. We defined a new internal format to convert various input types into one type so that overflow checking could be conducted easily according to range of output types. The internal format is similar to the extended format of floating point double precision defined in IEEE754 2008 standard. This standard specifies that minimum exponent bit-width of the extended format of floating point double precision is 15bits, but 11bits are enough to implement the proposed converting unit. Also, we optimized rounding stage of the convertor unit so that we could make it possible to operate rounding and represent correct negative numbers using an incrementer instead an adder. We designed single cycle data path and 5 cycles data path. After describing the HDL model for two data paths of the convertor, we synthesized them with TSMC 180nm technology library using Synopsys design compiler. Cell area of synthesis result occupies 12,886 gates(2 input NAND gate), and maximum operating frequency is 411MHz.
Keywords
Convertor; Internal format; Floating point number; Fixed pooint number; IEEE 754 standard;
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Times Cited By KSCI : 1  (Citation Analysis)
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1 L. Saldanha and R. Lysecky, "Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors," Design Automation for Embedded Systems, vol. 13, pp. 139-157, 2009.   DOI   ScienceOn
2 H. Zheng-wei, et al., "Pipeline Design of Transformation between Floating Point Numbers Based on IEEE754 Standard and 32-bit Integer Numbers," in Intelligent Information Technology and Security Informatics, 2009. IITSI '09. Second International Symposium on, 2009, pp. 92-96.
3 H. Hu, et al., "Multiply-add fused float point unit with on-fly denormalized number processing," in Circuits and Systems, 2005. 48th Midwest Symposium on, 2005, pp. 1466-1468 Vol. 2.
4 V. G. Oklobdzija, "An algorithmic and novel design of a leading zero detector circuit: comparison with logic synthesis," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 2, pp. 124-128, 1994.   DOI   ScienceOn
5 John Hauser, SoftFloat, http://www.jhauser.us/arithmetic/SoftFloat.html
6 DesignWare Building Block IP Documentation Overview, Synopsys, Inc., Mountain View, CA, Feb. 2009.
7 K. Hyun-pil, et al., "The Design of a Structure of Network Co-processor for SDR(Software Defined Radio)," The Journal of The Korean Institute of Communication Sciences, vol. 32, pp. 188-194, 2007.
8 Z. Linsheng, et al., "Floating-point to Fixed-point Transformation Using Extreme Value Theory," in Computer and Information Science, 2009. ICIS 2009. Eighth IEEE/ACIS International Conference on, 2009, pp. 271-276.
9 "IEEE Standard for Binary Floating-Point Arithmetic," ANSI/IEEE Std 754-1985, p. 0_1, 1985.
10 "IEEE Standard for Floating-Point Arithmetic," IEEE Std 754-2008, pp. 1-58, 2008.
11 K. Ki-Il, et al., "A floating-point to integer C converter with shift reduction for fixed-point digital signal processors," in Acoustics, Speech, and Signal Processing, 1999. ICASSP '99. Proceedings., 1999 IEEE International Conference on, 1999, pp. 2163-2166 vol.4.
12 K. Ki-Il, et al., "AUTOSCALER for C: an optimizing floating-point to integer C program converter for fixed-point digital signal processors," Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 47, pp. 840-848, 2000.   DOI   ScienceOn