1 |
Chunhua Liao, Zhenying Liu, Lei Huang, and Barbara Chapman. "Evaluating OpenMP on Chip MultiThreading Platforms," In First international workshop on OpenMP, Eugene, Oregon USA, June 2005.
|
2 |
조한욱, 조송현, 송용호, "멀티코어 프로세서에서의 H.264/AVC 디코더를 위한 데이터 레벨 병렬화 성능 예측 및 분석," 전자공학회논문지, 제46권, 제8호, 102-116쪽, 2009년 8월.
과학기술학회마을
|
3 |
M. Roitzsch, "Slice-Balancing H.264 Video Encoding for Improved Scalability of Multicore Decoding," in Work-in-Progress Proceedings of the 27th IEEE, 2006
|
4 |
Klaus Schomann, Markus Fauster, Oliver Lampl, Laszlo Boszormenyi, "An Evaluation of Parallelization Concepts for Baseline-Prole Compliant H.264/AVC Decoders," in Lecture Notes in Computer Science. Euro-Par 2007 Parallel Processing, August 2007.
|
5 |
J. Chong, N. R. Satish, B. Catanzaro, K. Ravindran, and K.Keutzer,"Effcient parallelization of h.264 decoding with macro block level scheduling," in 2007 IEEE International Conference on Multimedia and Expo, July 2007.
|
6 |
J. Hoogerbrugge and A. Terechko, "A Multithreaded Multicore System for Embedded Media Processing," Transactions on High- Performance Embedded Architectures and Compilers, vol. 3, no. 2, pp.168-187, June 2008.
|
7 |
Kosuke Nishihara, Atsushi Hatabu, Tatsuji Moriyoshi, "Parallelization of H.264 video decoder for embedded multicore processor," In Proceedings of ICME'2008. pp.329-332
|
8 |
ISO, Information Technology-Coding of Audio-Visual Objects, Part10-Advanced Video Coding, ISO/IEC 14496-10.
|
9 |
Thomas Wiegand, Gary J. Sullivan, Gisle Bjontegaard, and Ajay Luthra, Senior Member, "Overview of the H.264/AVC Video Coding Standard", IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 7, pp. 560-576, July 2003
|
10 |
Michael Horowitz, Anthony Joch, Faouzi Kossentini, and Antti Hallapuro, "H.264/AVC Baseline Profile Decoder Complexity Analysis," IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 7, pp. 704-716 July 2003.
DOI
ScienceOn
|
11 |
E. van der Tol, E. Jaspers, and R.Gelderblom, "Mapping of H.264 decoding on a multiprocessor architecture," Image and Video Communications and Processing, pp.707-718, May, 2003.
|
12 |
A. Rodriguez, A. Gonzalez, and M. P. Malumbres, "Hierarchical parallelization of an h.264/avc video encoder," in Proc. Int. Symp. on Parallel Computing in Electrical Engineering, 2006, pp. 363–368.
|
13 |
M.S.Lam, "Software Pipelining: An Effective Scheduling Technique for VLIW Machines," in Proc. of the SIGPLAN'88 Conference on PLDI, pages 318-328, Atlanta, GA, June 1988.
|
14 |
ITU-T Recommendation H.264, SERIES H: AUDIOVISUAL AND MULTIMEDIA SYSTEMS Infrastructure of audiovisual services- Coding of moving video, May 2003.
|
15 |
심동규, 남정학, "고속 비디오 처리를 위한 병렬화 기술," 전자공학회논문지, 제36권 제4호, (통권 제299호), 83-90쪽, 2009년 4월.
과학기술학회마을
|
16 |
A. Azevedo, C. Meenderinck, B. Juurlink, A. Terechko, J. Hoogerbrugge, M. Alvarez, and A. Rammirez, "Parallel H.264 Decoding on an Embedded Multicore Processor," in Proceedings of the 4th International Conference on High Performance and Embedded Architectures and Compilers-HIPEAC, Jan 2009.
|
17 |
Subbarao Palacharla, Norman P. Jouppi and James E.Smith. "Complexity-E ective Superscalar Processors," In 24th International Symposium on Computer Architecture, pp. 206-218, June 1997.
|