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Full-Custom Design of a Serial Peripheral Interface Circuit for CMOS RFIC Testing  

Uhm, Jun-Whon (Dept. of Wireless Communications Engineering, Kangwon University)
Lee, Un-Bong (Dept. of Electrical Engineering, Korea Advanced Institute of Science and Technology)
Shin, Jae-Wook (Dept. of Wireless Communications Engineering, Kangwon University)
Shin, Hyun-Chol (Dept. of Wireless Communications Engineering, Kangwon University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.9, 2009 , pp. 68-73 More about this Journal
Abstract
This paper presents an easily modifiable structure of a serial peripheral interface (SPI) that is suitable for efficient testing of CMOS RF integrated circuits. The proposed SPI Is designed so that the address size and the accompanying software can be easily adjusted and modified according to the requirements and complexity of RF IC's under development. The hardware architecture and software algorithm to achieve the flexibility are described. The proposed SPI is fabricated in $0.13{\mu}m$ CMOS and successfully verified experimentally with a 2.7GHz fractional-N delta-sigma frequency synthesizer as a device under test.
Keywords
Serial Peripheral Interface; SPI; RFIC; Testing; CMOS;
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