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Switch Architecture and Routing Optimization Strategy Using Optical Interconnects for Network-on-Chip  

Kwon, Soon-Tae (School of Information and Communication Engineering, Sungkyunkwan University)
Cho, Jun-Dong (School of Information and Communication Engineering, Sungkyunkwan University)
Han, Tae-Hee (School of Information and Communication Engineering, Sungkyunkwan University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.9, 2009 , pp. 25-32 More about this Journal
Abstract
Recently, research for Network-on-chip(NoC) is progressing. However, due to the increase of system complexity and demand on high performance, conventional copper-based electrical interconnect would be faced with the design limitation of performance, power, and bandwidth. As an alternative to these problems, combined use of Electrical Interconnects(EIs) and Optical Interconnects(OIs) has been introduced. In this paper we propose efficient routing optimization strategy and hybrid switch architecture, which use OIs for critical path and EIs for non-critical path. The proposed method shows up to 25% performance improvement and 38% power reduction.
Keywords
NoC; Optical interconnect; Hybrid Switch architecture; Routing optimization; Low-Power;
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