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Design of Novel OTP Unit Bit and ROM Using Standard CMOS Gate Oxide Antifuse  

Shin, Chang-Hee (Department of Electronics Computer Engineering, Hanyang University)
Kwon, Oh-Kyong (Department of Electronics Computer Engineering, Hanyang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.5, 2009 , pp. 9-14 More about this Journal
Abstract
In this paper, we proposed a novel OTP unit bit of CMOS gate oxide antifuse using the standard CMOS process without additional process. The proposed OTP unit bit is composed of 3 transistors including an NMOS gate oxide antifuse and a sense amplifier of inverter type. The layout area of the proposed OTP unit bit is $22{\mu}m^2$ similar to a conventional OTP unit bit. The programming time of the proposed OTP unit bit is 3.6msec that is improved than that of the conventional OTP unit bit because it doesn't use high voltage blocking elements such as high voltage blocking switch transistor and resistor. And the OTP array with the proposed OTP unit bit doesn't need sense amplifier and bias generation circuit that are used in a conventional OTP array because sense amplifier of inverter type is included to the proposed OTP unit bit.
Keywords
Non-Volatile Memory; OTP; CMOS Gate Oxide Antifuse;
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Times Cited By KSCI : 2  (Citation Analysis)
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