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High Performance Nand Flash Controller using Multi-Processing Scheme  

Kang, Shin-Wook (Department of Electrical and Electronic Engineering, Yonsei University)
Lee, Dong-Woo (Digital Media R&D Center, Samsung Electronic Co., Ltd.)
Jeong, Seong-Hun (Digital Media R&D Center, Samsung Electronic Co., Ltd.)
Lee, Yong-Surk (Department of Electrical and Electronic Engineering, Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.1, 2009 , pp. 7-14 More about this Journal
Abstract
Lately, NAND flash cards have been used to store massive amounts of multimedia data. However, these nand flash cells itself has a slow operation time and by that, the nand flash cards are not appropriate for high performance massive data transfer. Indeed, most flash card products have a disadvantage in that they require plenty of time to transfer massive amounts of data. Therefore, we propose a new architectural design for the hardware and software of the NAND flash cards by improving their data transfer rate. Our design is based on a multiprocessing which is different from the conventional serial processing method. We simulated our design under the VIP (Virtual IP) environment, and verified our work using FPGA test platforms. As a result, the downloading performances was approximately 160MB/s on VIP and 85.3MB/s on FPGA.
Keywords
NAND Flash; Controller; Pipeline; Multi Channel; Virtual Platform; FTL;
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