Browse > Article

Design of Temperature-Compensated Power-Up Detector  

Ko, Tai-Young (Department of Electronics and Electrical Engineering, Sungkyunkwan University)
Jun, Young-Hyun (Semiconductor Division, Samsung Electronics)
Kong, Bai-Sun (Department of Electronics and Electrical Engineering, Sungkyunkwan University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.46, no.10, 2009 , pp. 1-8 More about this Journal
Abstract
In this paper, a temperature variation-insensitive power-up detector for use in analog and digital integrated systems has been proposed. To provide temperature-insensitive characteristic, nMOS and pMOS voltage dividers in the proposed power-up detector are made to have zero temperature coefficient by exploiting the fact that the effective gate-source voltage of a MOS transistor can result in mutual compensation of mobility and threshold voltage for temperature independency. Comparison results using a 68-nm CMOS process indicate that the proposed power-up detector achieves as small as 4 mV voltage variation at 1.0 V power-up voltage over a temperature range of $-30^{\circ}C$ to $90^{\circ}C$, resulting in 92.6% reduction on power-up voltage variations over conventional power-up detectors.
Keywords
power-up; temperature Compensation; voltage divider; detector; temperature coefficient;
Citations & Related Records
연도 인용수 순위
  • Reference
1 T. Kuroda, T. Fujita, S. Mita, 'A 0.9 V 150 MHz 10 mW 4 mm2 2-D discrete cosinetransform core processor with variable-threshold voltage scheme,' in IEEE Int. Solid-State Circuits Conf., pp. 166-167, Feb 1996
2 N. Kokubo and K. Ikeda, 'Voltage level detecting circuit,' U.S. Patent 5 378 936, Jan.1995
3 C. J. Chevallier, 'Power level detection circuit,'U.S. Patent 5 581 206, Dec. 1996
4 I. M. Filanovsky and A. Allam, 'Mutual temperature effects with applications in CMOS circuits,'IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no.7, pp. 876-883, Jul.2001   DOI   ScienceOn
5 A. Bendali and Y. Audet, 'A 1-V CMOS current reference with temperature and process compensation, IEEE Trans. Circuits Syst. I, vol. 54, no.7, pp. 1424.1429, Jul. 2007   DOI   ScienceOn
6 S. Mutoh, S. Shigematsu, Y. Matsuya, 'A 1 Vmulti-threshold voltage CMOS DSP with an efficient power management technique for mobile phone applications,' in IEEE Int. Solid-State Circuits Conf., Vol. 39, pp. 168-169, Feb 1996
7 International Technology Roadmap for Semiconductors(ITRS). Makuhari Messe, Japan,2007
8 S. Tanimoto, 'Power on reset circuit with accurate detection at low voltages,' U.S. Patent 5 485 111, Jan. 1996