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Design of Control Block for Passive UHF RFID Tag IC  

Woo, Cheol-Jong (Samsung Electronics Co.)
Cha, Sang-Rok (Dept. of Semiconductor Eng., Chungbuk National Univ.)
Kim, Hak-Yun (Dept. of Semiconductor Eng., Chungbuk National Univ.)
Choi, Ho-Yong (School of Electrical & Computer Eng., Chungbuk National Univ.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.45, no.9, 2008 , pp. 41-49 More about this Journal
Abstract
This paper presents a design of the control block of a passive UHF RFID tag IC according to EPCglobal Class-1 Generation-2 UHF RFID 1.1.0 Protocol. The control block includes a PIE block, CRC5/CRC16, a Slot Counter, a Random Number Generator, a Main Control Block, a Encoder and a Memory Interface. The control block has been designed using the Verilog HDL and has been simulated. Functional simulation results for the overall control block operation show that 11 instructions with 7 states are operated correctly. Also, the control block has been implemented with 36,230 gates by Synopsys Design Compiler and Apollo using Magnachip 0.25$\mu$m technology.
Keywords
RFID; EPCglobal; UHF;
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