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A study on forming a spacer for wafer-level CIS(CMOS Image Sensor) assembly  

Kim, Il-Hwan (School of Electrical Engineering and Computer Science, Seoul National University)
Na, Kyoung-Hwan (School of Electrical Engineering and Computer Science, Seoul National University)
Kim, Hyeon-Cheol (School of Electrical Engineering and Computer Science, Seoul National University)
Chun, Kuk-Jin (School of Electrical Engineering and Computer Science, Seoul National University)
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Abstract
This paper describes the methods of spacer-fabrication for wafer-level CIS(CMOS Image Sensor) assembly. We propose three methods using SU-8, PDMS and Si-interposer for the spacer-fabrication. For SU-8 spacer, novel wafer rotating system is developed and for PDMS(poly-dimethyl siloxane) spacer, new fabrication-method is used to bond with alignment of glass/PDMS/glass structure. And for Si-interposer, DFR(Dry Film Resist) is used as adhesive layer. The spacer using Si-interposer has the strongest bonding strength and the strength is 32.3MPa with shear.
Keywords
spacer; CIS; SU-8; PDMS; DFR;
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