Browse > Article

Digit-Serial Finite Field Multipliers for GF($3^m$)  

Chang, Nam-Su (Graduate School of Information Management and Security, Korea University)
Kim, Tae-Hyun (Graduate School of Information Management and Security, Korea University)
Kim, Chang-Han (School of Information & Communication systems, Semyung University)
Han, Dong-Guk (Electronics and Telecommunications Research Institute)
Kim, Ho-Won (Dept. of Computer Science & Engineering, Pusan University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.45, no.10, 2008 , pp. 23-30 More about this Journal
Abstract
Recently, a considerable number of studies have been conducted on pairing based cryptosystems. The efficiency of pairing based cryptosystems depends on finite fields, similar to existing public key cryptosystems. In general, pairing based ctyptosystems are defined over finite fields of chracteristic three, GF($3^m$), based on trinomials. A multiplication in GF($3^m$) is the most dominant operation. This paper proposes a new most significant digit(MSD)-first digit- serial multiplier. The proposed MSD-first digit-serial multiplier has the same area complexity compared to previous multipliers, since the modular reduction step is performed in parallel. And the critical path delay is reduced from 1MUL+(log ${\lceil}n{\rceil}$+1)ADD to 1MUL+(log ${\lceil}n+1{\rceil}$)ADD. Therefore, when the digit size is not $2^k$, the time delay is reduced by one addition.
Keywords
Digit-Serial Multiplier; Elliptic Curve Cryptosystem; Pairing Based Cryptosystem; Hardware Architecture;
Citations & Related Records
연도 인용수 순위
  • Reference
1 I. Duursma and H.-S. Lee, "Tate pairing implementation for hyperelliptic curves $y^{2}=x^{p}+d$," Asiacrypt 2003, LNCS 2894, pp.111-123, Springer-Verlag, 2003
2 D.Page and N. Smart "Hardware Implementation of Finite Fields of Characteristic Three," CHES 2002, LNCS 2523, pp.529-539, Springer-Verlag, 2003
3 L. Song and K. Parhi, "Low energy digit-serial/parallel finite field multipliers", Journal of VLSI Signal Processing, Vol.19, No.2, pp.149-166, July 1998   DOI   ScienceOn
4 G. Bertoni, J. Guajardo, S. Kumar, G. Orlando C. Paar and T. Wollinger. "Efficient GF(pm) Arithmetic Architectures for Cryptographic Applications," CT-RSA 2003, LNCS 2612, pp.15 8-175. Springer-Verlag, 2003
5 J. Beuchat, T. Miyoshi, Y. Oyama, E. Okamoto, "Multiplication over on FPGA: A Survey", ARC-2007, LNCS 4419, pp.214-225, Springer- Verlag, 2007
6 R. Granger, D. Page, and M. Stam, "Hardware and software normal basis arithmetic for pairing based cryptography in characteristic three," IEEE Transactions on Computers, Vol.54, No.7, pp.852-860, July 2005   DOI   ScienceOn
7 T. Kerins, E. M. Popovici and W. P. Marnane. "Algorithms and Architectures for use in FPGA implementations of Identity Based Encryption Schemes," FPL 2004, LNCS 3203, pp.74-83, Springer-Verlag, 2004
8 T. Kerins, W. Marnane, E. Popovici, P. S. L. M. Barreto "Efficient Hardware for the Tate Pairing Calculation in Characteristic Three," CHES 2005, LNCS 3659, pp.398-411, Springer-Verlag, 2005
9 C.Shu, S. Kwon, and K. Gaj, "FPGA accelerated Tate pairing based cryptosystemover binary fields", Cryptography ePrint Archive, Report 2006/179, 2006
10 P.S.L.M. Barreto, H.Y. Kim, B. Lynn, and M. Scott, "Efficient algorithms for pairing-based cryptosystems," CRYPTO 2002, LNCS 2442, pp.354-368, Springer-Verlag, 2002
11 P.S.L.M. Barreto, S. Galbraith, C. O hEigeartaigh and M. Scott, "Efficient Pairing Computation on Supersingular Abelian Varieties," Designs, Codes and Cryptography, Vol.42, No.3, pp.239-271, 2007   DOI