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Optimal Design of Network-on-Chip Communication Sturcture  

Yoon, Joo-Hyeong (Hanyang University)
Hwang, Young-Si (Hanyang University)
Chung, Ki-Seok (Hanyang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.8, 2007 , pp. 80-88 More about this Journal
Abstract
High adaptability and scalability are two critical issues in implementing a very complex system in a single chip. To obtain high adaptability and scalability, novel system design methodology known as communication-based system design has gained large attention from SoC designers. NoC (Network-on-Chip) is such an on-chip communication-based design approach for the next generation SoC design. To provide high adaptability and scalability, NoCs employ network interfaces and routers as their main communication structures and transmit and receive packetized data over such structures. However, data packetization, and routing overhead in terms of run time and area may cost too much compared with conventional SoC communication structure. Therefore, in this research, we propose a novel methodology which automatically generates a hybrid communication structure. In this work, we map traditional pin-to-pin wiring structure for frequent and timing critical communication, and map flexible and scalable structure for infrequent, or highly variable communication patterns. Even though, we simplify the communication structure significantly through our algorithm the connectivity or the scalability of the communication modules are almost maintained as the original NoC design. Using this method, we could improve the timing performance by 49.19%, and the area taken by the communication structure has been reduced by 24.03%.
Keywords
System-on-Chip; Network-on-Chip; Design Methodology;
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