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Design of Reconfigurable Coprocessor for Multimedia Mobile Terminal  

Kim, Nam-Sub (Div. of Information Engineering and Telecommunications, Hallym University)
Lee, Sang-Hun (School of Electronics and Information, Kyung Hee University)
Kum, Min-Ha (School of Electronics and Information, Kyung Hee University)
Kim, Jin-Sang (School of Electronics and Information, Kyung Hee University)
Cho, Won-Kyung (School of Electronics and Information, Kyung Hee University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.4, 2007 , pp. 63-72 More about this Journal
Abstract
In this paper, we propose a novel reconfigurable coprocessor for multimedia mobile terminals. Because most of multimedia operations require fast operations of large amount of data in the limited clock frequency, it is necessary to enhance the performance of the embedded processor that is widely used in current multimedia mobile terminals. Therefore, we proposed and have designed the coprocessor which had the ability of fast operations of multimedia data. The proposed coprocessor was not only reconfigurable, but also flexible and expandable. The proposed coprocessor has been designed by using VHDL and compared with previous reconfigurable coprocessors and a commercial embedded processor in architecture and speed. As a result of the architectural comparison, the proposed coprocessor had better structure in terms of hardware size and flexibility. Also, the simulation results of DCT application showed that the proposed coprocessor was 26 times faster than a commercial ARM processor and 11 times faster than the ARM processor with fast DCT core.
Keywords
Coprocessor; Reconfigurable Architecture; Multimedia; Mobile Terminal;
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