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An Efficiency Testing Algorithm for Realistic Faults in Dual-Port Memories  

Park, Young-Kyu (Department of Electrical and Electronic Engineering, Yonsei University)
Yang, Myung-Hoon (Department of Electrical and Electronic Engineering, Yonsei University)
Kim, Yong-Joon (Department of Electrical and Electronic Engineering, Yonsei University)
Lee, Dae-Yeal (Department of Electrical and Electronic Engineering, Yonsei University)
Kang, Sung-Ho (Department of Electrical and Electronic Engineering, Yonsei University)
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Abstract
The development of memory design and process technology enabled the production of high density memory. However, this increased the complexity of the memory making memory testing more complicated, and as a result, it brought about an increase in memory testing costs. Effective memory test algorithm must detect various types of defects within a short testing time, and especially in the case of port memory test algorithm, it must be able to detect single port memory defects, and all the defects in the dual port memory. The March A2PF algorithm proposed in this paper is an effective test algorithm that detects all types of defects relating to the duel port and single port memory through the short 18N test pattern.
Keywords
Dual Port Memory; Test Algorithm; Fault Model;
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