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An X-masking Scheme for Logic Built-In Self-Test Using a Phase-Shifting Network  

Song, Dong-Sup (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University)
Kang, Sung-Ho (Department of Electrical and Electronic Engineering, Graduate School, Yonsei University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.2, 2007 , pp. 127-138 More about this Journal
Abstract
In this paper, we propose a new X-masking scheme for utilizing logic built-in self-test The new scheme exploits the phase-shifting network which is based on the shift-and-add property of maximum length pseudorandom binary sequences(m-sequences). The phase-shifting network generates mask-patterns to multiple scan chains by appropriately shifting the m-sequence of an LFSR. The number of shifts required to generate each scan chain mask pattern can be dynamically reconfigured during a test session. An iterative simulation procedure to synthesize the phase-shifting network is proposed. Because the number of candidates for phase-shifting that can generate a scan chain mask pattern are very large, the proposed X-masking scheme reduce the hardware overhead efficiently. Experimental results demonstrate that the proposed X-masking technique requires less storage and hardware overhead with the conventional methods.
Keywords
Logic BIST; response compaction; X-masking; phase-shifting;
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