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Design of Cryptic Circuit for Passive RFID Tag  

Lim, Young-Il (Dept. of Information & Communication Engineering, Chungbuk National University)
Cho, Kyoung-Rok (Dept. of Information & Communication Engineering, Chungbuk National University)
You, Young-Gap (Dept. of Information & Communication Engineering, Chungbuk National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.1, 2007 , pp. 8-15 More about this Journal
Abstract
This paper proposed hardware architecture of the block cryptographic algorithm HIGHT aiming small size and low power application, and analyzed its performance. The HIGHT is a modified algorithm of the Feistel. The encryption and decryption circuit were designed as one iterative block. It reduces the redundant circuit that yields small area. For the performance improvement, the circuit generates 32-bit subkey during 1 clock cycle. we synthesized the HIGHT with Hynix $0.25-{\mu}m$ CMOS technology. The proposed circuit size was 2.658 EG(equivalent gate), and its power consumption was $10.88{\mu}W$ at 2.5V for 100kHz. It is useful for a passive RFID tag or a smart IC card of a small size and low power.
Keywords
cryptographic; hardware architecture;
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