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An Efficient Coarse Tuning Scheme for Fast Switching Frequency Synthesizer in PHS Applications  

Park Do-Jin (Konkuk University)
Jung Sung-Kyu (Konkuk University)
Kim Jin-Kyung (Konkuk University)
Pu Young-Gun (Konkuk University)
Jung Ji-Hoon (Konkuk University)
Lee Kang-Yoon (Konkuk University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.43, no.9, 2006 , pp. 10-16 More about this Journal
Abstract
This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning scheme for PHS applications. The proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about $20{\mu}s$ and the phase noise is -121dBc/Hz at 600kHz offset. This chip is fabricated with $0.25{\mu}m$ CMOS technology, and the die area is $0.7mm{\times}2.1mm$. The power consumption is 54mW at 2.7V supply voltage.
Keywords
Coarse Tuning; Frequency Synthesizer; Phase Noise; Lock time; Weighted Capacitance;
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