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A Design of Floating-Point Geometry Processor for Embedded 3D Graphics Acceleration  

Nam Ki hun (Dpet. Of Computer Science SeoKyeong Univ.)
Ha Jin Seok (Dept. of Computer Engineering SeoKyeong Univ.)
Kwak Jae Chang (Dept. of Computer Science SeoKyeong Univ.)
Lee Kwang Youb (Dept. of Computer Engineering SeoKyeong Univ.)
Publication Information
Abstract
The effective geometry processing IP architecture for mobile SoC that has real time 3D graphics acceleration performance in mobile information system is proposed. Base on the proposed IP architecture, we design the floating point arithmetic unit needed in geometry process and the floating point geometry processor supporting the 3D graphic international standard OpenGL-ES. The geometry processor is implemented by 160k gate area in a Xilinx-Vertex FPGA and we measure the performance of geometry processor using the actual 3D graphic data at 80MHz frequency environment The experiment result shows 1.5M polygons/sec processing performance. The power consumption is measured to 83.6mW at Hynix 0.25um CMOS@50MHz.
Keywords
3D Graphics accelerator; Floating-Point Unit; Geometry processor;
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