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(Turbo Decoder Design with Sliding Window Log Map for 3G W-CDMA)  

Park, Tae-Gen (School of Information, Communication and Electronics Engineering, Catholic University)
Kim, Ki-Hwan (Mobile Communication Technology Research Lab. LG Electronics Inc.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.42, no.9, 2005 , pp. 73-80 More about this Journal
Abstract
The Turbo decoders based on Log-MAP decoding algorithm inherently requires large amount of memory and intensive complexity of hardware due to iterative decoding, despite of excellent decoding efficiency. To decrease the large amount of memory and reduce hardware complexity, the result of previous research. And this paper design the Turbo decoder applicable to the 3G W-CDMA systems. Through the result of previous research, we decided 5-bits for the received data 6-bits for a priori information, and 7-bits for the quantization state metrics. The error correction term for $MAX^{*}$ operation which is the main function of Log-MAP decoding algorithm is implemented with very small hardware overhead. The proposed Turbo decoder is synthesized in $0.35\mu$m Hynix CMOS technology. The synthesized result for the Turbo decoder shows that it supports a maximum 9Mbps data rate, and a BER of $10^{-6}$ is achieved(Eb/No=1.0dB, 5 iterations, and the interleaver size $\geq$ 2000).
Keywords
Turbo Codes; Turbo Decoder; W-CDMA; Log-MAP;
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