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An 8b 220 MS/s 0.25 um CMOS Pipeline ADC with On-Chip RC-Filter Based Voltage References  

이명진 (서강대학교 전자공학과)
배현희 (LG전자 디지털 미디어 연구소)
배우진 (서강대학교 전자공학과)
조영재 (서강대학교 전자공학과)
이승훈 (서강대학교 전자공학과)
김영록 (서강대학교 전자공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.41, no.10, 2004 , pp. 69-75 More about this Journal
Abstract
This work proposes an 8b 220 MS/s 230 mW 3-stage pipeline CMOS ADC with on-chip filers for temperature- and power- insensitive voltage references. The proposed RC low-pass filters improve switching noise performance and reduce reference settling time at heavy R & C loads without conventional off-chip large bypass capacitors. The prototype ABC fabricated in a 0.25 um CMOS occupies the active die area of 2.25 $\textrm{mm}^2$ and shows the measured DNL and INL of maximum 0.43 LSB and 0.82 LSB, respectively. The ADC maintains the SNDR of 43 dB and 41 dB up to the 110 MHz input at 200 MS/s and 220 MS/s, respectively, while the SNDR at the 500 MHz input is degraded as much as only 3 dB than the SNDR at the 110 MHz input.
Keywords
광대역 SHA;기준전압;RC 필터;파이프라인 ADC;
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