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Effect of Ge mole fraction and Strained Si Thickness on Electron Mobility of FD n-MOSFET Fabricated on Strained Si/Relaxed SiGe/SiO2/Si  

백승혁 (한양대학교 전자통신전파공학과)
심태헌 (한양대학교 전자통신전파공학과)
문준석 (한양대학교 전자통신전파공학과)
차원준 (한양대학교 전자통신전파공학과)
박재근 (한양대학교 전자통신전파공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.41, no.10, 2004 , pp. 1-7 More about this Journal
Abstract
In order to enhance the electron mobility in SOI n-MOSFET, we fabricated fully depletion(FD) n-MOSFET on the strained Si/relaxed SiGa/SiO$_2$/Si structure(strained Si/SGOI) formed by inserting SiGe layer between a buried oxide(BOX) layer and a top silicon layer. The summated thickness of the strained Si and relaxed SiGe was fixed by 12.8 nm and then the dependency of electron mobility on strained Si thickness was investigated. The electron mobility in the FD n-MOSFET fabricated on the strained Si/SGOI enhanced about 30-80% compared to the FD n-MOSFET fabricated on conventional SOI. However, the electron mobility decreased with the strained Si thickness although the inter-valley phonon scattering was reduced via the enhancement of the Ge mole fraction. This result is attributed to the increment of intra-valley phonon scattering in the n-channel 2-fold valley via the further electron confinement as the strained Si thickness was reduced.
Keywords
strained-Si; SiGe; SiGe-on-Insulator; SGOI; mobility;
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