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The ATM SAR Processor Optimized for VoDSL Service  

손윤식 (한양대학교 전자공학과)
정정화 (한양대학교 전자공학과)
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Abstract
In this paper, we propose an ATM processor suitable for VoDSL subscriber's equipments. The processor is composed of ATM block, AAL protocol block and ATS scheduler, and provides up to 4 VCC which service data and voice traffics on the ATM network. The proposed ATS scheduler can guarantee QoS of the voice traffic and supports multiple AAL2 packet. The ATM processor is manufactured on the 0.35 micron fabrication line of HYNIX semiconductor and provides the maximum data transfer rate of up to 52 Mbps. We implement the LAD, which is the VoDSL subscriber's equipment. The experimental results on the test bed network shows that the proposed hardware scheme successfully services most of the applications of the VoDSL services.
Keywords
ATM; AAL2; scheduler; QoS; VoDSL;
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  • Reference
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