1 |
K. T. Lee, C. Nordquist, and J. Abraham, 'Test Generation for Crosstalk Effects in VLSI Circuits', IEEE International Symposium on Circuits and Systems, Vol. 4, pp. 628-631, 1996
DOI
|
2 |
김석윤, VLSI 시스템 회로연결선의 모형화 및 해석, IDEC 교재 개발 시리즈 10, 시그마프레스, 1999
|
3 |
P. Goel, 'An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits', IEEE Transactions on Computers, Vol. C-30, March, 1981
|
4 |
A. Vittal and M. Marek-Sadowska, 'Crosstalk reduction for VLSI', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 16, pp. 290- 298, March 1997
DOI
ScienceOn
|
5 |
K. Rahmat, J. Neves, J. Lee, 'Methods for calculating coupling noise in early design: a comparative analysis', Proceedings of International Conference on Computer Design VLSI in Computers and Processors, pp. 76-81, 1998
DOI
|
6 |
H. Kawaguchi and T. Sakurai, 'Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines', Proceedings of the Asian and South Pacific Design Automation Conference, pp. 35-43, 1998
DOI
|
7 |
A. Rubio, N. Itazaki, X. Xu, and K. Kinoshita, 'An approach to the analysis and detection of crosstalk faults in digital VLSI circuits', IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, Vol. 13, pp. 387-394, March 1994
DOI
ScienceOn
|
8 |
K. T. Lee, C. Nordquist, and J. Abraham, 'Automatic Test Pattern Generation for Crosstalk Glitches in Digital Circuits', Proceedings of IEEE VLSI Test Symposium, pp. 34-39, 1998
DOI
|
9 |
W. Y. Chen, S. K. Gupta, and M. A. Breuer, 'Test Generation in VLSI Circuits for Crosstalk Noise', Proceedings of International Test Conference. pp. 641-650, 1998
DOI
|
10 |
W. Y. Chen, S. K. Gupta, and M. A. Breuer, 'Analytic models for crosstalk delay and pulse analysis for non ideal inputs', Proceedings of International Test Conference, pp. 809-818, 1997
DOI
|