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유희준 'DRAM의 설계' 흥릉 과학 출판사
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Sung Ho Wang, Jeongpyo Kim, Joonsuk Lee, Hyoung Sik Nam, Young Gon Kim, Jae Hoon Shim, Hyung Ki Ahn, Seok Kang, Bong Hwa Jeong, Jin Hong Ahn, Beomsup Kim 'A 500-Mb/s Quadruple Data Rate SDRAM Interface Using a Skew Cancellation Technique' IEEE Journal of solid-state circuits, Vol. 36, No.4, APRIL 2001
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ScienceOn
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Dual-Line.co.ltd 'DRAM의 분류'
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Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, JunYoung Jean, Tae Sung Jung, Hongsik Jeong, TaeYoung Chung, Kinam Kim, Soo In Cho 'A 2.5-V, 333-Mb/s/pin, 1-Gbit, Double-Data-Rate Synchronous DRAM' IEEE Journal of solidstate circuits, Vol. 34, No. 11, NOVEMBER 1999
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ScienceOn
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Hiroki Fujisawa; Tsugio Takahashi; Masayuki Nakamura; Kazuhiko Kajigaya 'A Dual-Phase-Controlled Dynamic Latched Amplifier for High-Speed and Low-Power DRAMs' IEEE Journal of solid-state circuits, Vol. 36, No.7, JULY 2001
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ScienceOn
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