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Design of A CMOS Composite Transconductor for Low-voltage Low-power  

이근호 (전주대학교 정보기술컴퓨터공학부)
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Abstract
Two CMOS composite transistors with an improved operating region by reducing the threshold voltage are proposed in this paper. And also, as an application of the proposed composite transistors, the transconductor is designed. The proposed composite transistor I and II employ a P-type folded composite transistor and a composite diode in order to decrease the threshold voltage, respectively. The limitation of the operating region of these transistors by current source is described. All circuits are simulated by HSPICE using 0.25${\mu}{\textrm}{m}$ n-well process.
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1 J.Y. Michel, 'High-Performance Analog Cells in Mixed-Signal VLSI : Problems and Practical Solutions,' Analog Integrated Circuits and Signal Processing, vol, 171-182, Nov. 1991   DOI
2 R. Batruni, P.Lemaitre, and T.Fensch, 'Mixed Digital/Analog Signal Processing for a Single-Chip 2BIQ U-Interface Transceiver,' IEEE J. Solid-State Circuits, Vol. SC-26, pp. 1414-1425, Dec. 1990   DOI   ScienceOn
3 E. Seevinck and R. F. Wassenaar, 'A Versatile CMOS linear transconductor/ square-law function circuit,' IEEE J. Solid-State Circuits, Vol. SC-22, no. 3, p. 366-377, June, 1987
4 박희중, 차형우, 정원섭, '새로운 200MHz CMOS 선형트랜스컨덕터와 이를 이용한 20 MHz 일립틱 여파기의 설계,' 전자공학회눈문지, 제38권, SC편, 제4호, 20-30쪽, 2001   과학기술학회마을
5 L. A. R. Jr., and W. B.de Moraes, 'A Geometry Independent CMOS Transcondutor: New Method of Linearization and AC Analysis,' Proc. 20th Int. Conference on Microelectronics, pp. 491-496, 1995
6 A. Hyogo, C. Hwang, M. Ismail, and K. Sekin, 'LV/LP CMOS square-law circuits,'Proc. IEEE Midest. Symp. on Circuits and Systems, pp. 1181-1184, 1998   DOI
7 S. Szczepanski, A. Wyszynski, and R. Schaumann, 'Highly Linear Voltage-Controlled CMOS Transconductors,' IEEE Trans. Circuits and Systems, Vol. 40, No. 4, pp. 258-262, April, 1993   DOI   ScienceOn
8 S. Sakurai and M. Isamil, 'High Frequency Wide Range CMOS Analog Multiplier,' Electronics Lett., Vol. 28, No. 24, pp. 2228-2229, Nov., 1992   DOI   ScienceOn
9 S. I.Liu and Y. S. Hwang, 'CMOS Four-quadrant Multiplier using Bias Offset Crosscoupled Pairs,' Electronics Lett., Vol. 29, No. 20, pp. 1737-1738, Sep., 1993   DOI   ScienceOn