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A Phase-Locked Loop with a Self-Noise Suppressing Voltage Controlled Oscillator  

Choi, Young-Shig (Pukyong National University)
Oh, Jung-Dae (Pukyong National University)
Choi, Hyek-Hwan (Pukyong National University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea TC / v.47, no.8, 2010 , pp. 47-52 More about this Journal
Abstract
In this paper, a phase-locked loop with a self-noise suppressing voltage controlled oscillator to improve a phase noise characteristic has been proposed. The magnitude of the proposed transfer function is maximum 25dB lower than that of a conventional transfer function around a bandwidth. The proposed PLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by HSPICE simulation.
Keywords
Phase-Locked Loop (PLL); Frequency voltage converter (FVC); Self-noise suppressing VCO;
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