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Efficient bit-parallel multiplier for GF(2$^m$) defined by irreducible all-one polynomials  

Chang Ku-Young (Information Security Research Division, ETRI)
Park Sun-Mi (Department of Mathematics, Korea University)
Hong Do-Won (Information Security Research Division, ETRI)
Publication Information
Journal of the Institute of Electronics Engineers of Korea TC / v.43, no.7, 2006 , pp. 115-121 More about this Journal
Abstract
The efficiency of the multiplier largely depends on the representation of finite filed elements such as normal basis, polynomial basis, dual basis, and redundant representation, and so on. In particular, the redundant representation is attractive since it can simply implement squaring and modular reduction. In this paper, we propose an efficient bit-parallel multiplier for GF(2m) defined by an irreducible all-one polynomial using a redundant representation. We modify the well-known multiplication method which was proposed by Karatsuba to improve the efficiency of the proposed bit-parallel multiplier. As a result, the proposed multiplier has a lower space complexity compared to the previously known multipliers using all-one polynomials. On the other hand, its time complexity is similar to the previously proposed ones.
Keywords
finite field arithmetic; bit-parallel multiplier; redundant representation; all-one polynomial;
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