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Analysis and Design of Stacked Helix Chip Antenna  

Jung, Jin-Woo (Department of Electronics and Engineering, Chonnam National University)
Kim, Yu-Seon (Department of Electronics and Engineering, Chonnam National University)
Lee, Hyeon-Jin (Department of Electronics and Information, Dongkang College)
Lim, Yeong-Seog (Department of Electronics and Engineering, Chonnam National University)
Publication Information
Abstract
One of the approaches for reducing the size of the quarter wavelength monopole antenna is the helix and the stacked structure. This paper presents a formula for the relationship between the geometrical parameter and the operating frequency of a slacked helix chip antenna. The stacked helix chip antenna was designed for PCS/IMT-2000 dual-bands operation. The fabricated antenna uses an FR-4 substrate with relative permittivity of 4.2, and its dimensions are $15{\times}7.5{\times}0.4mm^3$. The measured impedance bandwidth (VSWR<2) is 400MHz at the operating frequency.
Keywords
Stacked; Helix; Modeling; Chip Antenna;
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