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(A New CMOS Buffer for Low Power with Self-Controlled Dual Driving Path)  

Bae, Hyo-Gwan (동원대학 전자과)
Ryu, Beom-Seon (충북대학교 전기전자공학과)
Jo, Tae-Won (충북대학교 전기전자공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SC / v.39, no.2, 2002 , pp. 140-145 More about this Journal
Abstract
A new CMOS buffer removing short-circuit power consumption is proposed. The gate-driving signal of the pull-up(pull-down) transistor at the output is controlled by delayed internal signal to get tri-state output momentarily by shunting off the path of the short-circuit current. The SPICE simulation results verified the operation of the proposed buffer and showed the enhancement of the power-delay product at 3.3V supply voltage about 42% comparing to the conventional tapered CMOS buffer(1).
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