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http://dx.doi.org/10.5370/KIEE.2014.63.4.490

A Design of High-speed Power-off Circuit and Analysis  

Jeong, Sang-Hun (Dept. of Nuclear Convergence Technology Development Korea Atomic Energy Research Institute)
Lee, Nam-Ho (Dept. of Nuclear Convergence Technology Development Korea Atomic Energy Research Institute)
Cho, Seong-Ik (Dept. of Electronic Engineering, Chonbuk National University)
Publication Information
The Transactions of The Korean Institute of Electrical Engineers / v.63, no.4, 2014 , pp. 490-494 More about this Journal
Abstract
In this paper, a design of high-speed power-off circuit and analysis. The incidence of high-dose transient radiation into the silicon-based semiconductor element induces the photocurrent due to the creation of electron-hole pairs, which causes the upset phenomenon of active elements or triggers the parasitic thyristor in the element, resulting in latch-up. High speed power-off circuit was designed to prevent burn-out of electronic device caused by Latch-up. The proposed high speed power-off circuit was configured with the darlington transistor and photocoupler so that the power was interrupted and recovered without the need for an additional circuit, in order to improve the existing problem of SCR off when using the thyristor. The discharge speed of the high speed power interruption circuit was measured to be 19 ${\mu}s$ with 10 ${\mu}F$ and 500 ${\Omega}$ load, which was 98% shorter than before (12.8 ms).
Keywords
Power-off; Latch-up; Transient Radiation Effects (TRE);
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
연도 인용수 순위
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