1 |
T. Ungerer, B. Robic, and J. Silk, "Multithreaded Processors," The Computer Journal, Vol. 45, No. 3, 2002
|
2 |
R. Kumar, D, M, Tullsen, P. Ranganathan, N. P. Jouppi, and K. I. Farkas, "Single-ISA Hetergogeneous Multi-Core Architectures for Multithreaded Workload Performance," Proceedings of the 31st International Symposium on Computer Architecture, Jun 2004.
|
3 |
S. W. Keckler, K. Olukotun, and H. P. Hofsee, "Multicore Processors and Systems," Springer. 2009.
|
4 |
Jongbok Lee, "A Performance Study of Multicore Out-of-order superscalar processor architectures," KIEE, Vol. 61, No. 10, Oct. 2012, pp. 1502-1507.
|
5 |
D. Ortiz-Arroyo and B. Lee. "Dynamic Simultaneous Multithreaded Architecture," International Conferences on Parallel and Distributed Computing Systems. Aug. 2003.
|
6 |
J. Gummaraju and M. Franklin. "Branch Prediction in Multi-Threaded Processors," Parallel Architectures and Compilation Techniques, pp.179-188, Oct. 2000.
|
7 |
T. Austin, E. Larson, and D. Ernest, "SimpleScalar : An Infrastructure for Computer System Modeling," Computer, vol. 35, no. 2, pp. 59-67, Feb. 2002.
DOI
ScienceOn
|
8 |
D. A. Jimenez and C. Lin,"Dynamic Branch Prediction with Perceptrons," High Performance Computer Architecture, Jun 2001, pp. 197-206
|
9 |
M. Frankilin, G. S. Sohi, "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References," IEEE Transactions on Computers, Vol. 45, No. 5, May 1996.
|
10 |
Jongbok Lee, "Multiple Branch Prediction Using Perceptrons," KIEE, Vol. 58, No. 3, Mar. 2009, pp. 621-626.
|