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http://dx.doi.org/10.5370/KIEE.2014.63.12.1704

A Performance Study of Multi-Core Processors with Perceptrons  

Lee, Jongbok (Dept. of Information and Communications Engineering, Hansung University)
Publication Information
The Transactions of The Korean Institute of Electrical Engineers / v.63, no.12, 2014 , pp. 1704-1709 More about this Journal
Abstract
In order to increase the performance of multi-core system processor architectures, the multi-thread branch predictor which speculatively fetches and allocates threads to each core should be highly accurate. In this paper, the perceptron based multi-thread branch predictor is proposed for the multi-core processor architectures. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed for the 2 to 16-core architectures employing perceptron multi-thread branch predictor extensively. Its performance is compared with the architecture which utilizes the two-level adaptive multi-thread branch predictor.
Keywords
Perceptron; Multi-core processor; Multi-thread branch predictor;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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