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http://dx.doi.org/10.9708/jksci.2020.25.02.021

CPWL : Clock and Page Weight based Disk Buffer Management Policy for Flash Memory Systems  

Kang, Byung Kook (Dept. of Computer Engineering, Yeungnam University)
Kwak, Jong Wook (Dept. of Computer Engineering, Yeungnam University)
Publication Information
Journal of the Korea Society of Computer and Information / v.25, no.2, 2020 , pp. 21-29 More about this Journal
Abstract
The use of NAND flash memory is continuously increased with the demand of mobile data in the IT industry environment. However, the erase operations in flash memory require longer latency and higher power consumption, resulting in the limited lifetime for each cell. Therefore, frequent write/erase operations reduce the performance and the lifetime of the flash memory. In order to solve this problem, management techniques for improving the performance of flash based storage by reducing write and erase operations of flash memory with using disk buffers have been studied. In this paper, we propose a CPWL to minimized the number of write operations. It is a disk buffer management that separates read and write pages according to the characteristics of the buffer memory access patterns. This technique increases the lifespan of the flash memory and decreases an energy consumption by reducing the number of writes by arranging pages according to the characteristics of buffer memory access mode of requested pages.
Keywords
Disk buffer; Flash memory; LRU algorithm; CLOCK algorithm; Page replacement; Page access patterns;
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