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http://dx.doi.org/10.9708/jksci.2019.24.07.001

Buffer Policy based on High-capacity Hybrid Memories for Latency Reduction of Read/Write Operations in High-performance SSD Systems  

Kim, Sungho (Software Research Team, Gyeongbuk Institute of IT Convergence Industry Technology (GITC))
Hwang, Sang-Ho (Wellness Convergence Research Center, Daegu Gyeongbuk Institute of Science and Technology (DGIST))
Lee, Myungsub (Dept. of Computer Information, Yeungnam University College)
Kwak, Jong Wook (Dept. of Computer Engineering, Yeungnam University)
Park, Chang-Hyeon (Dept. of Computer Engineering, Yeungnam University)
Publication Information
Journal of the Korea Society of Computer and Information / v.24, no.7, 2019 , pp. 1-8 More about this Journal
Abstract
Recently, an SSD with hybrid buffer memories is actively researching to reduce the overall latency in server computing systems. However, existing hybrid buffer policies caused many swapping operations in pages because it did not consider the overall latency such as read/write operations of flash chips in the SSD. This paper proposes the clock with hybrid buffer memories (CLOCK-HBM) for a new hybrid buffer policy in the SSD with server computing systems. The CLOCK-HBM constructs new policies based on unique characteristics in both DRAM buffer and NVMs buffer for reducing the number of swapping operations in the SSD. In experimental results, the CLOCK-HBM reduced the number of swapping operations in the SSD by 43.5% on average, compared with LRU, CLOCK, and CLOCK-DNV.
Keywords
NAND flash memory; Buffer policy; Swapping operation; Hybrid buffer systems; Non-volatile memories;
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