1 |
Zhiwei Qin , Yi Wang , Duo Liu , Zili Shao, "A Two-Level Caching Mechanism for Demand-Based Page-Level Address Mapping in NAND Flash Memory Storage Systems," Proceedings of the 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium, p.157-166, April 11-14, 2011.
|
2 |
Qi Zhang, Xuandong Li, Linzhang Wang, Tian Zhang, Yi Wang, and Zili Shao, "Optimizing translation information management in NAND flash memory storage systems," In Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC'13). pp. 326-331, 2013.
|
3 |
"Yet another flash file system", http://yaffs.net
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4 |
S. Lee, D. Park, T. Chung, D. Lee, S. Park, H. Song, "A log buffer based flash tarnslation layer using fully associative sector translation," ACM Trans. Embedded Computing Sys, Vol. 6, No. 3, pp.1-27, 2007.
DOI
|
5 |
GUPTA, A., KIM, Y., AND URGAONKAR, B, "DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings," In Proceedings of ASPLOS'09, pp. 229-240, March 2009.
|
6 |
Websearch Trace from Umass Trace Repository. http://traces.cs.umass.edu/index.php/Storage/Storage.
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7 |
A. B. Bityutskiy, "JFFS3 design issues". http://www.linux-mtd.infradead.org
|
8 |
C. Lee, D. Sim, J. Hwang , and S. Cho, "F2FS: A New File System for Flash Storage," Proc. 13th USENIX Conference on File and Storage Technologies (FAST'15), pp.273-286, Feb. 2015.
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9 |
OLTP Trace from UMass Trace Repository. http://traces.cs.umass.edu/index.php/Storage/Storage.
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10 |
Z. Qin. Y. Wang, D. Liu, Z. Shao, and Y. Guan, "MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems," In DAC '11, pp. 17-22, 2011.
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11 |
You Zhou , Fei Wu , Ping Huang , Xubin He , Changsheng Xie , Jian Zhou, "An efficient page-level FTL to optimize address translation in flash memory," Proceedings of the Tenth European Conference on Computer Systems, Article No. 12, Bordeaux, France, April 21-24, 2015.
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