Browse > Article
http://dx.doi.org/10.9708/jksci.2014.19.3.109

An Improved Quine-McCluskey Algorithm for Circuit Minimization  

Lee, Sang-Un (Dept. of Multimedia Eng., Gangneung-Wonju National University)
Abstract
This paper revises the Quine-McCluskey Algorithm to circuit minimization problems. Quine-McCluskey method repeatedly finds the prime implicant and employs additional procedures such as trial-and-error, branch-and-bound, and Petrick's method as a means of circuit minimization. The proposed algorithm, on the contrary, produces an implicant chart beforehand to simplify the search for the prime implicant. In addition, it determines a set cover to streamline the search for $1^{st}$ and $2^{nd}$ essential prime implicants. When applied to 3-variable and 4-variable experimental data, the proposed algorithm has indeed proved to obtain the optimal solutions much more simply and accurately than the Quine-McCluskey method.
Keywords
Prime Implicant; Essential Prime Implicant; Frequency; Cardinality; Set Cover;
Citations & Related Records
연도 인용수 순위
  • Reference
1 V. Kabanets and J. Y. Cai, "Circuit Minimization Problem," Proceedings of 32nd Symposium on Theory of Computing, Portland, Oregon, USA, pp. 73-79, Jun. 2000.
2 M. Karnaugh, "The Map Method for Synthesis of Combinational Logic Circuits," Transactions of the American Institute of Electrical Engineers, part I, Vol. 72, No. 9, pp. 593-599, Nov. 1953.   DOI
3 N. Sarkar, K. Petrus, and H. Hossain, "Software Implementation of the Quine-McCluskey Algorithm for Logic Gate Minimisation," Proceedings of the NACCQ, pp. 375-378, Napier, New Zealand, Jul. 2001.
4 R. K. Brayton, G. D. Hachtel, C. McMullen, and A. L. Sangiovanni-Vincentelli, "Logic Minimization Algorithms for VLSI Synthesis," Springer, 1984.
5 N. V. Vinodchandran, "Nondeterministic Circuit Minimization Problem and Derandomizing Arthur-Merlin Games," International Journal of Foundations of Computer Science, Vol. 16, No. 6, Dec. 2005.
6 R. Siggh, A. Arora, G. Singh, and J. Malhotra, "Circuit Minimization in VLSI Using PSO & GA Algorithms," International Journal of Engineering Trends and Technology, Vol. 3, No. 1, pp. 43-46, Feb. 2012.
7 M. Morrison and N. Ranganathan, " A Novel Optimization Method for Reversible Logic Circuit Minimization," IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 182-187, Aug. 2013.
8 S. R. Petrick, "A Direct Termination of the Irredundant Forms of a Boolean Function from the Set of Prime Implicants," Technical Report AFCRC-TR-56-110, Air Force Cambridge Res. Center, Cambridge, MA, USA, 1956.