Browse > Article
http://dx.doi.org/10.9708/jksci.2012.17.5.009

Analysis of the CPU/GPU Temperature and Energy Efficiency depending on Executed Applications  

Choi, Hong-Jun (School of Electronics and Computer Engineering, Chonnam National University)
Kang, Seung-Gu (School of Electronics and Computer Engineering, Chonnam National University)
Kim, Jong-Myon (School of Electrical Engineering, University of Ulsan)
Kim, Cheol-Hong (School of Electronics and Computer Engineering, Chonnam National University)
Abstract
As the clock frequency increases, CPU performance improves continuously. However, power and thermal problems in the CPU become more serious as the clock frequency increases. For this reason, utilizing the GPU to reduce the workload of the CPU becomes one of the most popular methods in recent high-performance computer systems. The GPU is a specialized processor originally designed for graphics processing. Recently, the technologies such as CUDA which utilize the GPU resources more easily become popular, leading to the improved performance of the computer system by utilizing the CPU and GPU simultaneously in executing various kinds of applications. In this work, we analyze the temperature and the energy efficiency of the computer system where the CPU and the GPU are utilized simultaneously, to figure out the possible problems in upcoming high-performance computer systems. According to our experimentation results, the temperature of both CPU and GPU increase when the application is executed on the GPU. When the application is executed on the CPU, CPU temperature increases whereas GPU temperature remains unchanged. The computer system shows better energy efficiency by utilizing the GPU compared to the CPU, because the throughput of the GPU is much higher than that of the CPU. However, the temperature of the system tends to be increased more easily when the application is executed on the GPU, because the GPU consumes more power than the CPU.
Keywords
CPU; GPU; CUDA; Hotspot; Energy efficiency;
Citations & Related Records
연도 인용수 순위
  • Reference
1 V. Jimenez, L. Vilanova, I. Gelado, M. Gil, G. Fursin and N. Navarro, "Predictive runtime code scheduling for heterogeneous architectures," In Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers, pp.19-33 , 2009
2 F. Pollack, "New Microarchitecture Challenges in the Coming Generations of CMOS Process Technologies," International Symposium on Microarchitecture keynote speech, 1999.
3 P. Dadvar, and K. Skadron, "Potential thermal security risks," In Proceedings of the IEEE/ASME Semiconductor Thermal Measurement, Modeling, and Management Symposium(SEMI-THERM), pp. 229-234, 2005.
4 J. H. Jeong, "Heat-radiant and Cooling Device of Central Processing Unit and Peripheral devices," Journal of Korea Intellectual Patent Society, Vol. 8, No. 4, pp. 33-43, Dec., 2006.
5 J. D. Owens, D. Luebke, N. Govindaraju, M. Harris, J. Kruger, A. E. Lefohn, and T. J. Purcell, "A Survey of General-Purpose Computation on Graphics Hardware," Euro-graphics 2005, State of the Art Reports, pp. 21-51, 2005.
6 J. Krüger and R. Westermann, "Linear algebra operators for gpu implementation of numerical algorithms," ACM Transactions on Graphics, Vol. 22, No. 3, pp. 908-916, Jul., 2003.   DOI   ScienceOn
7 N. K. Govindaraju, B. Lloyd, W. Wang, M. Lin, and D. Manocha, "Fast computation of database operations using graphics processors," In Proceedings of International Conference on Special Interest Group on Computer Graphics and Interactive Techniques(SIGGRAPH), pp. 215-226, 2004.
8 W. Liu, B. Schmidt, G. Voss, and W. Muller-Wittig, "Streaming algorithms for biological sequence alignment on gpus," IEEE Transactions on Parallel and Distributed Systems, Vol. 18, No. 9, pp. 1270-1281, 2007.   DOI   ScienceOn
9 NVIDIA SDK, Available at http://developer.download.NVIDIA.com/compute/cuda/sdk/website/samples.html
10 Parboil Benchmark suite, Available at http://impact.crhc.illinois.edu/parboil.php
11 NVClock, Available at http://www.linuxhardware.org/nvclock/
12 I. Buck, "Gpu computing with nvidia cuda," In Proceedings of International Conference on Special Interest Group on Computer Graphics and Interactive Techniques(SIGGRAPH), pp. 6, 2007.
13 GPGPU, Available at http://gpgpu.org
14 NVIDIA CUDATM Programming Guide Version 2.3.1, Nvidia Corporation, 2009.
15 J. H. Choi, J. H. Kong, E. Y. Chung, and S. W. Chung, "A Dual Integer Register File Structure for Temperature-Aware Microprocessors," Journal of KISS A Computer System and Theory, Vol. 35, No. 11-12, pp.540-551, Dec., 2008.
16 A. Ghuloum, E. Sprangle, J. Fang, G. Wu, and X. Zhou, "Ct: A flexible parallel programming model for tera-scale architectures," White paper, Intel Corporation, 2007.
17 Technical Overview, ATI Stream Computing, AMD Inc., 2009.
18 OpenCL, Available at http://www.khronos.org/opencl/
19 J. H. Kong, and S. W. Chung, "Recent Thermal Management Techniques for Microprocessors," Communications of KIISE, Vol. 27, No. 11, pp. 72-79, Nov., 2009.
20 M. B. Taylor, J. Psota, A. Saraf, N. Shnidman, V. Strumpen, M. Frank, S. Amarasinghe, A. Agarwal, W. Lee, J. Miller, D. Wentzlaff, I. Bratt, B. Greenwald, H. Hoffmann, P. Johnson, and J. Kim, "Evaluation of the raw microprocessor: An exposed-wire-delay architecture for ilp and streams," In Proceedings of International Symposium on Computer Architecture, pp. 2-13, 2004.
21 P. Kongetira, K. Aingaran, and K. Olukotun, "Niagara: A 32-way multithreaded sparc processor," IEEE Micro, Vol. 25, Issue. 2, pp. 21-25, Mar.-Apr., 2005.   DOI   ScienceOn
22 T. Akenine-Möller, E. Haines, and N. Hoffman, "Real-Time Rendering(2nd edition)," AK PETERS, 2002.
23 K. Gray, "The Microsoft DirectX 9 Programmable Graphics Pipeline," Microsoft Press, 2003.
24 B. He, K. Yang, R. Fang, M. Lu, N. Govindaraju, Q. Luo, and P. Sander, "Relational joins on graphics processors," In Proceedings of International Conference on Special Interest Group on Management Of Data, pp. 511-524, 2008.