| 1 |
A. E. Fox, E. B. Golden, P. D. Dresselhaus, and S. P. Benz, "On-chip temperature distribution of Josephson voltage standard devices," IEEE Trans. Appl. Supercond., vol. 27, pp. 1500305, 2017.
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| 2 |
Y. Chong, P. D. Dresselhaus, and S. P. Benz, "Thermal transport in stacked superconductor-normal metal-superconductor Josephson junctions," Appl. Phys. Lett., vol. 83, pp. 1794, 2003.
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| 3 |
Y. Chong, P. D. Dresselhaus, and S. P. Benz, "Electrical properties of  Josephsonjunctions," Appl. Phys. Lett., vol. 86, pp. 232505, 2005.
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| 4 |
Y. Chong, C. J. Burroughs, P. D. Dresselhaus, N. Hadacek, H. Yamamori, and S. P. Benz, "Practical high-resolution programmable Josephson voltage standards using double- and triple-stacked  -barrier junctions," IEEE Trans. Appl. Supercond., vol. 15, pp. 461, 2005.
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| 5 |
P. D. Dresselhaus, M. M. Elsbury, D. Olaya, C. J. Burroughs, and S. P. Benz, "10 volt programmable Josephson voltage standard circuits using NbSi-barrier junctions," IEEE Trans. Appl. Supercond., vol. 21, pp. 693, 2011.
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| 6 |
H. Yamamori, M. Ishizaki, A. Shoji, P. D. Dresselhaus, and S. P. Benz, "10 V programmable Josephson voltage standard circuits using  double-junction stacks," Appl. Phys. Lett., vol. 88, pp. 042503, 2006.
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| 7 |
P. D. Dresselhaus, Y. Chong, J. H. Plantenberg, and S. P. Benz, "Stacked SNS Josephson Junction Arrays for Quantum Voltage Standards," IEEE Trans. Appl. Supercond., vol. 13, pp. 930, 2003.
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| 8 |
Y. Chong, P. D. Dresselhaus, S. P. Benz, and J. E. Bonevich, "Effects of interlayer electrode thickness in _{N}$} "$Nb/(MoSi_{2}/Nb)_{N}$") stacked Josephson junctions," Appl. Phys. Lett., vol. 82, pp. 2467 2003.
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| 9 |
N. Hadacek, P. D. Dresselhaus, Y. Chong, S. P. Benz, and J. E. Bonevich, "Fabrication and measurement of tall stacked arrays of SNS Josephson junctions," IEEE Trans. Appl. Supercond. , vol. 15, pp. 110, 2005.
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