EMTDC Modeling Method of Resistive type Superconducting Fault Current Limiter

An effective modeling and simulation scheme of a resistive type Superconducting fault Current Limiter (SFCL) using PSCAD/EMTDC is proposed in this paper. In case of High Temperature Superconducting (HTS) resistive type fault current limiter current limiting is implemented by the ultra-fast transition characteristics from the superconducting (non-resistive) state to the normal (resistive) state by overstepping the critical current density. The states can generally be divided into three sub-states: the superconducting state the quench state and the recovery state respectively. In order to provide alternative application schemes of a resistive type SFCL, an effective modeling and simulation method of the SFCL is necessary. For that purpose, in this study, an actual experiment based component model is developed and applied for the simulation of the real resistive type SFCL using PSCAD/EMTDC. The proposed simulation scheme can be implemented to the grid system readily under various system conditions including sort of faults and the system capacity as well. The simulation results demonstrate the effectiveness of the proposed model and simulation scheme.