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Exploiting Memory Sequence Analysis to Defense Wear-out Attack for Non-Volatile Memory  

Choi, Juhee (Dept. of Smart Information Communication Engineering, Sangmyung University)
Publication Information
Journal of the Semiconductor & Display Technology / v.21, no.4, 2022 , pp. 86-91 More about this Journal
Abstract
Cache bypassing is a scheme to prevent unnecessary cache blocks from occupying the capacity of the cache for avoiding cache contamination. This method is introduced to alleviate the problems of non-volatile memories (NVMs)-based memory system. However, the prior works have been studied without considering wear-out attack. Malicious writing to a small area in NVMs leads to the failure of the system due to the limited write endurance of NVMs. This paper proposes a novel scheme to prolong the lifetime with higher resistance for the wear-out attack. First, the memory reference pattern is found by modified reuse distance calculation for each cache block. If a cache block is determined as the target of the attack, it is forwarded to higher level cache or main memory without updating the NVM-based cache. The experimental results show that the write endurance is improved by 14% on average and 36% on maximum.
Keywords
Non-Volatile Memories; Wear-out Attack; Cache Replacement Policy; Cache Bypassing;
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