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Wafer Packing Box for Vibration Suppression Material Optimization  

Yoon, Jae-Hoon (Department of Mechanical Engineering, Kumoh National Institute of Technology)
Hur, Jang-Wook (Department of Mechanical Engineering, Kumoh National Institute of Technology)
Yi, Il-Hwan (Department of Mechanical Engineering, Kumoh National Institute of Technology)
Publication Information
Journal of the Semiconductor & Display Technology / v.21, no.2, 2022 , pp. 51-56 More about this Journal
Abstract
Recently, the demand for semiconductors is expanded to various industries, and the use of high-quality and high-performance chips is increasing. With the trend, the diameter magnification and high integration of the semiconductor wafers are mandatory. As a result, there is a growing demand for the productivity improvement and the surface precision. There have been many studies on the stabilization of the wafer manufacturing processes in order to satisfy those specifications. Many complaints have been appealed by the wafer buyers that there are many unacceptable wafers with surface defects and foreign material adhesion which are caused by the vibrations during transportation. This study intends to derive the material improvement of the packing box of the wafers to suppress the vibrations of the box, and eventually to reduce the surface defects and the foreign material adhesion. The result shows that optimal material can substantially decrease the vibration of the packing box.
Keywords
Semiconductor Wafer; Wafer Packaging Box; Design Alteration; Vibration Suppression; Stability Improvement;
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