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| 1 |
FinFET for Terabit Era
Choi, Yang-Kyu;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.1-11,
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| 2 |
Design Consideration of Body-Tied FinFETs ( MOSFETs) Implemented on Bulk Si Wafers
Han, Kyoung-Rok;Choi, Byung-Gil;Lee, Jong-Ho;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.12-17,
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| 3 |
Theoretical and Experimental Analysis of Back-Gated SOI MOSFETs and Back-Floating NVRAMs
Avci, Uygar;Kumar, Arvind;Tiwari, Sandip;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.18-26,
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| 4 |
Gate Tunneling Current and QuantumEffects in Deep Scaled MOSFETs
Choi, Chang-Hoon;Dutton, Robert W.;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.27-31,
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| 5 |
Simulation of Quantum Effects in the Nano-scale Semiconductor Device
Jin, Seong-Hoon;Park, Young-June;Min, Hong-Shick;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.32-40,
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| 6 |
CMOS Compatible Fabrication Technique for Nano-Transistors by Conventional Optical Lithography
Horst, C.;Kallis, K.T.;Horstmann, J.T.;Fiedler, H.L.;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.41-44,
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| 7 |
Flowable oxide CVD Process for Shallow Trench Isolation in Silicon Semiconductor
Chung, Sung-Woong;Ahn, Sang-Tae;Sohn, Hyun-Chul;Lee, Sang-Don;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.45-51,
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| 8 |
Device and Circuit Performance Issues with Deeply Scaled High-K MOS Transistors
Rao, V. Ramgopal;Mohapatra, Nihar R.;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.52-62,
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| 9 |
A Simple Analytical Model for the Study of Optical Bistability Using Multiple Quantum Well p-i-n Diode Structure
Jit, S.;Pal, B.B.;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.63-73,
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| 10 |
Microwave Photonics Frequency-Converted Link Using Electroabsorption Devices
Wu, Y.;Shin, D.S.;Chang, W.S.C.;Yu, P.K.L.;
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The Institute of Electronics and Information Engineers
, v.4, no.1, pp.74-81,
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