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Process-Structure-Property Relationship and its Impact on Microelectronics Device Reliability and Failure Mechanism
Tung, Chih-Hang;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.107-113,
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2 |
Stress and Stress Voiding in Cu/Low-k Interconnects
Paik, Jong-Min;Park, Hyun;Joo, Young-Chang;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.114-121,
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3 |
Some Characteristics of Anisotropic Conductive and Non-conductive Adhesive Flip Chip on Flex Interconnections
Caers, J.F.J.M.;De Vries, J.W.C.;Zhao, X.J.;Wong, E.H.;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.122-131,
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4 |
Comparison of retention characteristics of ferroelectric capacitors with films deposited by various methods for high-density non-volatile memory.
Sangmin Shin;Mirko Hofmann;Lee, Yong-Kyun;Koo, June-Mo;Cho, Choong-Rae;Lee, June-Key;Park, Youngsoo;Lee, Kyu-Mann;Song, Yoon-Jong;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.132-138,
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5 |
Analog CMOS Performance Degradation due to Edge Direct Tunneling (EDT) Current in sub-l00nm Technology
Navakanta Bhat;Thakur, Chandrabhan-Singh;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.139-144,
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Electrical Characteristics of InAlAs/InGaAs/InAlAs Pseudomorphic High Electron Mobility Transistors under Sub-Bandgap Photonic Excitation
Kim, H.T.;Kim, D.M.;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.145-152,
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Electrostatic Discharge (ESD) and Failure Analysis: Models, Methodologies and Mechanisms for CMOS, Silicon On Insulator and Silicon Germanium Technologies
Voldman, Steven H.;
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The Institute of Electronics and Information Engineers
, v.3, no.3, pp.153-166,
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