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1 Triple Material Surrounding Gate (TMSG) Nanoscale Tunnel FET-Analytical Modeling and Simulation
Vanitha, P.;Balamurugan, N.B.;Priya, G. Lakshmi; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.585-593,
2 A 1.25 GHz Low Power Multi-phase PLL Using Phase Interpolation between Two Complementary Clocks
Jin, Xuefan;Bae, Jun-Han;Chun, Jung-Hoon;Kim, Jintae;Kwon, Kee-Won; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.594-600,
3 Cathode Side Engineering to Raise Holding Voltage of SCR in a 0.5-㎛ 24 V CDMOS Process
Wang, Yang;Jin, Xiangliang;Zhou, Acheng;Yang, Liu; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.601-607,
4 Multi-Channel Audio CODEC with Channel Interference Suppression
Choi, Moo-Yeol;Lee, Sung-No;Lee, Myung-Jin;Lee, Yong-Hee;Park, Ho-Jin;Kong, Bai-Sun; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.608-614,
5 Dynamic Redundancy-based Fault-Recovery Scheme for Reliable CGRA-based Multi-Core Architecture
Kim, Yoonjin;Sohn, Seungyeon; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.615-628,
6 Current-Steered Active Balun with Phase Correction
Park, Ji An;Jin, Ho Jeong;Cho, Choon Sik; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.629-633,
7 Scalable Application Mapping for SIMD Reconfigurable Architecture
Kim, Yongjoo;Lee, Jongeun;Lee, Jinyong;Paek, Yunheung; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.634-646,
8 Pull-In Voltage Modeling of Graphene Formed Nickel Nano Electro Mechanical Systems (NEMS)
Lim, Songnam;Lee, Jong-Ho;Choi, Woo Young;Cho, Il Hwan; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.647-652,
9 Accurate RF C-V Method to Extract Effective Channel Length and Parasitic Capacitance of Deep-Submicron LDD MOSFETs
Lee, Sangjun;Lee, Seonghearn; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.653-657,
10 Integrate-and-Fire Neuron Circuit and Synaptic Device using Floating Body MOSFET with Spike Timing-Dependent Plasticity
Kwon, Min-Woo;Kim, Hyungjin;Park, Jungjin;Park, Byung-Gook; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.658-663,
11 Overstress-Free 4 × VDD Switch in a Generic Logic Process Supporting High and Low Voltage Modes
Song, Seung-Hwan;Kim, Jongyeon;Kim, Chris H.; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.664-670,
12 The Oscillation Frequency of CML-based Multipath Ring Oscillators
Song, Sanquan;Kim, Byungsub;Xiong, Wei; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.671-677,
13 Voltage and Frequency Tuning Methodology for Near-Threshold Manycore Computing using Critical Path Delay Variation
Li, Chang-Lin;Kim, Hyun Joong;Heo, Seo Weon;Han, Tae Hee; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.678-684,
14 Dynamic Reference Scheme with Improved Read Voltage Margin for Compensating Cell-position and Background-pattern Dependencies in Pure Memristor Array
Shin, SangHak;Byeon, Sang-Don;Song, Jeasang;Truong, Son Ngoc;Mo, Hyun-Sun;Kim, Deajeong;Min, Kyeong-Sik; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.685-694,
15 A 1-V 1.6-GS/s 5.58-ENOB CMOS Flash ADC using Time-Domain Comparator
Lee, Han-Yeol;Jeong, Dong-Gil;Hwang, Yu-Jeong;Lee, Hyun-Bae;Jang, Young-Chan; / The Institute of Electronics and Information Engineers , v.15, no.6, pp.695-702,