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| 1 |
Self-Checking Look-up Tables using Scalable Error Detection Coding (SEDC) Scheme
Lee, Jeong-A;Siddiqui, Zahid Ali;Somasundaram, Natarajan;Lee, Jeong-Gun;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.415-422,
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| 2 |
A 6-Gb/s Differential Voltage Mode Driver with Independent Control of Output Impedance and Pre-Emphasis Level
Bae, Chang-Hyun;Choi, Dong-Ho;Ahn, Keun-Seon;Yoo, Changsik;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.423-429,
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| 3 |
Design of a Fast Multi-Reference Frame Integer Motion Estimator for H.264/AVC
Byun, Juwon;Kim, Jaeseok;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.430-442,
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| 4 |
New Encoding Method for Low Power Sequential Access ROMs
Cho, Seong-Ik;Jung, Ki-Sang;Kim, Sung-Mi;You, Namhee;Lee, Jong-Yeol;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.443-450,
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| 5 |
An efficient LIN MCU design for In-Vehicle Networks
Yeon, Kyu-Bong;Chong, Jong-Wha;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.451-458,
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| 6 |
A Reset-Free Anti-Harmonic Programmable MDLL-Based Frequency Multiplier
Park, Geontae;Kim, Hyungtak;Kim, Jongsun;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.459-464,
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| 7 |
Low-Complexity Triple-Error-Correcting Parallel BCH Decoder
Yeon, Jaewoong;Yang, Seung-Jun;Kim, Cheolho;Lee, Hanho;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.465-472,
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| 8 |
An 8-b 1GS/s Fractional Folding CMOS Analog-to-Digital Converter with an Arithmetic Digital Encoding Technique
Lee, Seongjoo;Lee, Jangwoo;Lee, Mun-Kyo;Nah, Sun-Phil;Song, Minkyu;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.473-481,
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| 9 |
A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design
Choi, Minsoo;Sim, Jae-Yoon;Park, Hong-June;Kim, Byungsub;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.482-491,
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| 10 |
Influence of Series Resistance and Interface State Density on Electrical Characteristics of Ru/Ni/n-GaN Schottky structure
Reddy, M. Siva Pratap;Kwon, Mi-Kyung;Kang, Hee-Sung;Kim, Dong-Seok;Lee, Jung-Hee;Reddy, V. Rajagopal;Jang, Ja-Soon;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.492-499,
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| 11 |
Analytical Model of Double Gate MOSFET for High Sensitivity Low Power Photosensor
Gautam, Rajni;Saxena, Manoj;Gupta, R.S.;Gupta, Mridula;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.500-510,
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| 12 |
Monte Carlo Simulation Study: the effects of double-patterning versus single-patterning on the line-edge-roughness (LER) in FDSOI Tri-gate MOSFETs
Park, In Jun;Shin, Changhwan;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.511-515,
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| 13 |
Study of Switching and Kirk Effects in InAlAs/InGaAs/InAlAs Double Heterojunction Bipolar Transistors
Mohiuddin, M.;Sexton, J.;Missous, M.;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.516-521,
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| 14 |
Suppression Techniques of Subthreshold Hump Effect for High-Voltage MOSFET
Baek, Ki-Ju;Na, Kee-Yeol;Park, Jeong-Hyeon;Kim, Yeong-Seuk;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.522-529,
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| 15 |
Gate All Around Metal Oxide Field Transistor: Surface Potential Calculation Method including Doping and Interface Trap Charge and the Effect of Interface Trap Charge on Subthreshold Slope
Najam, Faraz;Kim, Sangsig;Yu, Yun Seop;
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The Institute of Electronics and Information Engineers
, v.13, no.5, pp.530-537,
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