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| 1 |
Design of 3-bit Arbitrary Logic Circuit based on Single Layer Magnetic-Tunnel-Junction Elements
Lee, Hyun-Joo;Kim, So-Jeong;Lee, Seung-Yeon;Lee, Seung-Jun;Shin, Hyung-Soon;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.1-7,
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| 2 |
A bio-sensor SoC Platform Using Carbon Nanotube Sensor Arrays
Chung, In-Young;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.8-14,
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| 3 |
Flying Bridge Bus Architecture
Lee, Kook-Pyo;Yoon, Yung-Sup;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.15-21,
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| 4 |
Design of Efficient 8bit CMOS AD Converter for SOC Application
Kwon, Seung-Tag;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.22-28,
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| 5 |
Low Space Complexity Bit Parallel Multiplier For Irreducible Trinomial over GF( )
Cho, Young-In;Chang, Nam-Su;Kim, Chang-Han;Hong, Seok-Hie;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.29-40,
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| 6 |
Development of a Two-Stage High Gain D-Band MMIC Drive Amplifier Using  Metamorphic HEMT Technology
Lee, Bok-Hyung;Rhee, Jin-Koo;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.41-46,
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| 7 |
Low Power UHF Tag Chip Design
Kwon, Hyuk-Je;Lee, Pyeong-Han;Lee, Chul-Hee;Kim, Chong-Kyo;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.47-56,
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| 8 |
A Transaction Level Simulator for Performance Analysis of Solid-State Disk (SSD) in PC Environment
Kim, Dong;Bang, Kwan-Hu;Ha, Seung-Hwan;Chung, Sung-Woo;Chung, Eui-Young;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.57-64,
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| 9 |
A 0.4-2GHz, Seamless Frequency Tracking controlled Dual-loop digital PLL
Son, Young-Sang;Lim, Ji-Hoon;Ha, Jong-Chan;Wee, Jae-Kyung;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.65-72,
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| 10 |
The Performance Analysis of Distributed Reorder Buffer in Superscalar Processor using Analytical Model
Yoon, Wan-Oh;Shin, Kwang-Sik;Kim, Kyeong-Seob;Lee, Yun-Sub;Choi, Sang-Bang;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.73-82,
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| 11 |
A Low Power QPP Interleaver Address Generator Design Using The Periodicity of QPP
Lee, Won-Ho;Rim, Chong-Suck;
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The Institute of Electronics and Information Engineers
, v.45, no.12, pp.83-88,
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