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Analytical Model of Breakdown Voltages for Abrupt pn Junctions in III-V Binary Semiconductors
정용성;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.1-9,
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2 |
Implementation of a Single Chip CMOS Transceiver for the Fiber Optic Modules
채상훈;김태련;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.11-17,
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3 |
Fabrication and Characterization of 70 nm T-gate AlGaAs/InGaAs/GaAs metamorphic HEMT Device
김성찬;임병옥;백태종;고백석;신동훈;이진구;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.19-24,
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4 |
Design and Fabrication of 100 GHz MIMIC Amplifier Using Metamorphic HEMT
안단;이복형;임병옥;이문교;백용현;채연식;박형무;이진구;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.25-30,
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5 |
Extending the Single-Mode-Operation Radius of the Oxide-VCSEL by Controlling the Thickness and Position of the Oxide-Layer
김남길;김상배;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.31-37,
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6 |
Low Power Turbo Decoder Design Techniques Using Two Stopping Criteria
임호영;강원경;신현철;김경호;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.39-48,
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7 |
Design of readout circuit for linear two-color infrared detector array
김철범;우두형;강상구;이희철;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.49-56,
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8 |
RZ/NRZ Mixture mode Data Transmission to reduce Signal Transition in the Asynchronous Circuits
이원철;이제훈;조경록;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.57-64,
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9 |
An FPGA Implementation of Acoustic Echo Canceller Using S-LMS Algorithm
이행우;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.65-71,
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10 |
Hardware Implementation of Elliptic Curve Scalar Multiplier over GF(2n) with Simple Power Analysis Countermeasure
김현익;정석원;윤중철;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.73-84,
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11 |
A new efficient algorithm for test pattern compression considering low power test in SoC
신용승;강성호;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.85-95,
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12 |
A New Test Technique of SOC Test Based on Embedded Cores for Reducing SOC Test Time
강길영;김근배;임정빈;전성훈;강성호;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.97-106,
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13 |
The Third-Order Multibit Sigma-Delta Modulator with Data Weighted Averaging
김선홍;최석우;조성익;김동용;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.107-114,
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14 |
Highly Efficient and Low Power FIR Filter Chip for PRML Read Channel
Jin Yong, Kang;Byung Gak, Jo;Myung Hoon, Sunwoo;
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The Institute of Electronics and Information Engineers
, v.41, no.9, pp.115-124,
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